1. Field of the Invention
The invention concerns electrically programmable memories in integrated circuit form, generally known as EEPROMs or EPROMs, depending on whether or not they are electrically erasable, or as flash EPROMs if they are erasable in blocks.
2. Description of the Prior Art
To program these memories, it is generally necessary to have a "programming voltage" Vpp, available in the integrated circuit. This voltage Vpp is appreciably higher than the normal supply voltage Vcc of the circuit. For example, Vcc is usually equal to 5 volts and Vpp to 15 volts or more.
In certain memories, the programming voltage Vpp is given by an external supply. This fact, however, then calls for an additional specific supply terminal for the integrated circuit. The additional terminals add to the cost of the integrated circuits and it is preferred to avoid them.
This is why integrated memories are proposed, wherein the programming voltage Vpp is produced within the integrated circuit itself, out of the normal supply voltage Vcc. To this end, a circuit conventionally known as a charge pump or voltage multiplier is used. This circuit receives Vcc and sets up a voltage Vpp higher than Vcc.
Booster circuits basically and quite simply use switches, two capacitors and a two-phase clock to actuate the switches. In an initial period, the first capacitor is charged to 5 volts, then it is discharged into the second capacitor. Then a cycle recommences: in a first period, the first capacitor is charged to 5 volts and, in a second period, it is discharged into the second capacitor (this time, the second capacitor is already partially charged). The voltage at the terminals of the second capacitor then increases. Continuing in this way, within a few strokes of the two-phase clock, a voltage which is the double of Vcc is reached at the second capacitor. With two stages, the voltage Vcc is multiplied fourfold within a few clock strokes.
The output voltage of a multiplier circuit with several stages is regulated by a regulator as shown in FIG. 1. This regulator is constituted by a chain of transistors which are mounted as diodes so that each of them sets up a voltage, between its source and its drain, equal to its threshold voltage. Depending on the technology implemented, the threshold voltage is variable and the number of series-mounted transistors makes it possible to define the regulated voltage at output of the regulator.
For example, for a threshold voltage of the order of 1 volt for the transistors in series, mounted as diodes, sixteen transistors are needed to set up a regulated voltage Vpp of the order of 16 volts.
One of the problems of these assemblies for producing Vpp within the integrated circuit is that the voltage at output of the voltage multiplier and at the terminals of the regulator increases too rapidly: with a clock having a frequency of the order of one megahertz, only a few microseconds are needed, for example 20 microseconds for the voltage to reach Vpp.
Now, it has been realised that when Vpp increases too swiftly, the lifetime of the cells of the memory programmed by Vpp diminishes considerably. For Vpp is produced only when a cell is being programmed, and the rising front of Vpp is applied directly to the memory cell during programming. The excessively swift rise time of Vpp produces electrical fields inducing a deterioration of the gate oxide of the floating-gate transistors constituting the memory.
To reduce the speed of the rise time, the arrangement generally used, at output of the regulator is an analog circuitry which is complex and bulky, difficult to design and put into final shape, and sensitive to technological parameters and to the temperature. This circuitry produces a voltage Vpp rising in a ramp with a rise time of the order of one to two milliseconds. This is far more appropriate and enables the lifetime of the cells to be increased from 1000 programmings to 100,000 programmings.
An aim of the invention is to propose a circuit that is far simpler to implement, which can be used to limit the rise time of Vpp and thus increase the lifetime of the programmed cells. Instead of setting up an analog ramp at output of the regulator, the invention provides for the digital control of the increase in the voltage set up by the regulator itself, by means of a digital counter, the counting frequency of which is such that the regulated voltage increases with the desired slowness.